EasyBuild Tech Talks VIII

AVX10 for HPC
A reasonable solution to the 7 levels of AVX-512 folly

Felix LeClair

Date & time

Fri 13 Oct 2023 - 13:30 UTC


Please register via https://event.ugent.be/registration/ebtechtalk008avx10

Live stream

Link to live stream (via YouTube) coming soon!


The talk will be presented via Zoom,
and streamed live via the EasyBuild YouTube channel.
Q&A will be live via Zoom after the talk, or via the #tech-talks channel in the EasyBuild Slack (join here).

Talk description

HPC has been using Same Instruction, Multiple Data (SIMD) paradigms to increase the performance of machines, libraries, and codes since the early days of the Cray Vector processor. This talk provides a historical overview of x86 and x86_64 SIMD instruction sets from the 90's to modern, currently unreleased processors. It seeks to introduce the new AVX10 specification, specifically its impact within High Performance Computing.

Focusing on HPC, this talk is targeted towards two primary demographics: HPC packaging/system supporters/administrators and HPC Compiler/Math Library optimization Developers.

The goal of this talk is demystifying x86_64 Advanced Vector eXtensions in all its forms, from the original HPC focused AVX1, the general workload focused AVX2, the 7 different non-overlapping levels of AVX-512, and a return to normality with AVX10 in its 2.5 forms. HPC specifically will benefit from AVX10 not by having new instructions, but rather by resetting the common baseline that developers, administrators and users can target. Regardless of their cluster, a simple check of two flags for code size, and the feature set level is known. No more custom lookup tables for various non-overlapping implementations.

Outline of the talk:



(available shortly after the session)


(available shortly after the session via the EasyBuild YouTube channel)

(go to overview of EasyBuild Tech Talks)