Date & time

Registration

• Free to attend, open to anyone interested in the topic.
• Registration closes Wed 11 Oct 2023 at 23:59 CEST.
• Only registered people will be able to join the Zoom session!

Live stream

Practical

Talk description

HPC has been using Same Instruction, Multiple Data (SIMD) paradigms to increase the performance of machines, libraries, and codes since the early days of the Cray Vector processor. This talk provides a historical overview of x86 and x86_64 SIMD instruction sets from the 90's to modern, currently unreleased processors. It seeks to introduce the new AVX10 specification, specifically its impact within High Performance Computing.

Focusing on HPC, this talk is targeted towards two primary demographics: HPC packaging/system supporters/administrators and HPC Compiler/Math Library optimization Developers.

The goal of this talk is demystifying x86_64 Advanced Vector eXtensions in all its forms, from the original HPC focused AVX1, the general workload focused AVX2, the 7 different non-overlapping levels of AVX-512, and a return to normality with AVX10 in its 2.5 forms. HPC specifically will benefit from AVX10 not by having new instructions, but rather by resetting the common baseline that developers, administrators and users can target. Regardless of their cluster, a simple check of two flags for code size, and the feature set level is known. No more custom lookup tables for various non-overlapping implementations.

Outline of the talk:

• In the beginning, there was x87, and we’ve universally agreed this was a bad idea
• MMX: Look mum! I can do two things at once!
• SSE1-2: Now I can do up to 4 things at once, and operate on floating point data types!
• SSE3-4.2: I can do 4 things, and manipulate *how* I do them
• AVX1: 256 bits of floating point action, time for maths to fly
• AVX2: You get a signed integer! You get a signed integer! Everybody gets signed integers!
• AVX-512 Part 1: They were the best of times, they were the worst of times.
• AVX-512 Part 2: *And then things went very, very wrong*
• AVX-512 Part 3: *Why yes, I too would like 5 more spec expansions without contiguous supersets*
• AVX10.1/512: Ok, let’s make all of AVX-512 less of a PITA
• AVX10.1/256: Ok, let’s make all of AVX-512 available to consumers in a reasonable way
• AVX10.1/128: Ok, let’s ruin all of the progress of AVX10 before it’s even out there

• AVX white paper
• AVX512 history: video + slides
• AVX10 white paper

Slides

Recording

(go to overview of EasyBuild Tech Talks)